Vol 46, No 5 (2017)

Micromagnetic modeling is used to study the energetics of magnetic switching of a rectangular single-layer permalloy nanoisland. The potential local energy minima of this system are found in the absence of an external field. The magnetization reversal along the long axis of the island is studied at different values of a constant transverse bias field. It is found that the presence of such a bias leads to a reduction of the longitudinal switching field. The energy landscape of the system is studied using the Nudged Elastic Band (NEB) method to shed more light on the nature of the effect. It is shown that the energy barrier for longitudinal switching is reduced with the growth of the magnitude of the transverse bias. This effect may have practical applications for optimizing MRAM technology, because it helps reduce the memory cell’s switching field.

This paper is devoted to developing and optimizing the processing route that improves the effectiveness of diamond dicing of SiC device wafers with monolithic microwave integrated circuits (MMICs). The results of the experimental investigation of the diamond dicing effect on the MMIC parameters in the developed processing route are presented.

This paper presents a method for designing the memory array of a multiport register file that makes it possible to reduce power consumption. The method is based on reorganizing the transistors in the read ports of a bitcell, as well as in the communication element between the local and global read bit lines. The method is adapted to the 28-nm technology. For comparative analysis, several layout variants were designed. For these layouts, by simulation, the power consumption values in the active mode and the leakage current values are obtained. As a result of the investigations, the active power consumption in the memory array is reduced by up to 19% and the leakage currents are reduced by 53% without loss of speed.

The results of the studies of the features of integrating the elements of nonvolatile ferroelectric random access memory (FRAM) with CMOS technology are presented. The possibility and prospects of using their nanosized layers in the elements of nonvolatile FRAM are demonstrated.

This paper presents a technique for optimizing small-signal parameters of monolithic microwave signal switches on MOS transistors. The technique is based on analytical expressions and visual plots that allow us to determine the topological sizes of transistors providing the optimal values of insertion losses and isolation (decoupling). The effect of the parasitic inductance of connecting bondwires on the characteristics of signal switches is investigated; it is shown that parasitic inductance has a minor effect on insertion losses and reflection losses, but causes severe degradation of isolation. Based on the proposed technique, an IP block for a monolithic microwave switch, which can be used as an antenna switch or a composite functional block in multibit step phase shifters and S- or C-band attenuators, is designed. The comparative results of the numerical simulation and experimental investigation of the 0.25 µm CMOS IP block are presented; at the frequency of 1 GHz, the block has an upper linearity bound of at least +17 dBm, insertion losses of not more than 0.6 dB, and isolation not worse than -37 dB.