Using Combined Optical Techniques to Control the Shallow Etching Process

Abstract

Controlling the procedure for etching shallow trench insulation (STI) is part of the CMOS production cycle. Optical scatterometry, which allows the simultaneous replacement of several techniques used earlier, can be used to increase the reliability of and information obtained with this control process. The etching of shallow trench insulation is described in this work using a dimensional scheme that considers features of the actual procedure. Combined means of controlling the etching of shallow trench insulation are presented. The boundaries of optical scatterometry applicability are investigated, and means are considered that can be used beyond these boundaries (particularly in the range below ~20 nm). The proposed procedure allows not only linear dimensions to be controlled, but also the depth of the etching trench and the slope of its walls (which were not controlled earlier) during the production cycle itself. Control of these parameters during the production cycle lowers production costs and improves the reliability of the integrated circuits. The process is substantiated using the example of 180 nm technology, but the possibility of applying the process to smaller design norms is discussed.