Отправить статью по E-mail Comparative Analysis of Double Gate Junction Less (DG JL) and Gate Stacked Double Gate Junction Less (GS DG JL) MOSFETs
- Авторы: Shrey Arvind Singh 1, Shweta Tripathi 1
-
Учреждения:
- Motilal Nehru National Institute of Technology
- Выпуск: Том 53, № 13 (2019)
- Страницы: 1804-1810
- Раздел: Physics of Semiconductor Devices
- URL: https://journals.rcsi.science/1063-7826/article/view/207465
- DOI: https://doi.org/10.1134/S1063782619130190
- ID: 207465
Цитировать
Открытый доступ
Доступ предоставлен
Только для подписчиков
Аннотация
The quest for downscaling of devices has led to novel configurations with better performance parameters of which Junction Less (JL) MOSFET is an important configuration regarding its applicability. The JL MOSFETs have been analyzed for the physics behind its operation but a comparative study with the practically available devices is important from the point of view of further studies under the topic of JL MOSFETs. Further, the analytical modelling of GS DG JL MOSFETs is an analysis of crucial importance which has been discussed here.
Ключевые слова
Об авторах
Shrey Arvind Singh
Motilal Nehru National Institute of Technology
Email: shtri@mnnit.ac.in
Индия, Allahabad, Prayagraj, 211004
Shweta Tripathi
Motilal Nehru National Institute of Technology
Автор, ответственный за переписку.
Email: shtri@mnnit.ac.in
Индия, Allahabad, Prayagraj, 211004
Дополнительные файлы
