Analytical Modeling of Surface Potential and Drain Current of Hetero-Dielectric DG TFET and Its Analog and Radio-Frequency Performance Evaluation

Abstract

In the present paper, analytical modeling of surface potential and drain current for hetero-dielectric double gate tunnel FET (HDG-TFET) has been done. The two dimensional (2D) Poisson’s equation has been solved with suitable boundary conditions by using the method of parabolic approximation to find the surface potential along the channel length. Subsequently, using the electric field expression derived from surface potential has been used to calculate the drain current expression. The proposed analytical models have been verified and compared with the results obtained from the ATLAS^TM simulator. The effect of varying gate voltage, drain voltage, doping concentration, length and thickness of dielectric on surface potential of the device has been calculated and analyzed in detail. Additionally, a detailed study of the influence of various parameters on the RF and analog properties of HDG-TFET like drain current (Id), transconductance to drain current ratio (g_m/I_d), the cut-off frequency (f_T) and the maximum frequency of oscillation (f_max) are evaluated using Y- and H-parameters obtained from ATLAS^TM, a 2D device simulator.