An Integrated High-Capacitance Varicap Based on Porous Silicon

Abstract

The potential for use of porous silicon in designing varicaps with high capacitance ratios satisfying the requirements of microelectronics and microsystems engineering is considered. The technique for the fabrication of capacitor structures via the electrodeposition of copper onto porous silicon is presented. The morphological features of the obtained structures are examined and the specific capacitance of varicaps is determined. The prospects for the application of varicaps based on porous silicon in integrated electronics are outlined.