An Integrated High-Capacitance Varicap Based on Porous Silicon


Citar

Texto integral

Acesso aberto Acesso aberto
Acesso é fechado Acesso está concedido
Acesso é fechado Somente assinantes

Resumo

The potential for use of porous silicon in designing varicaps with high capacitance ratios satisfying the requirements of microelectronics and microsystems engineering is considered. The technique for the fabrication of capacitor structures via the electrodeposition of copper onto porous silicon is presented. The morphological features of the obtained structures are examined and the specific capacitance of varicaps is determined. The prospects for the application of varicaps based on porous silicon in integrated electronics are outlined.

Sobre autores

S. Timoshenkov

National Research University of Electronic Technology

Autor responsável pela correspondência
Email: spt@miee.ru
Rússia, Moscow, 124498

A. Boyko

National Research University of Electronic Technology

Email: spt@miee.ru
Rússia, Moscow, 124498

D. Gaev

Berbekov Kabardino-Balkarian State University

Email: spt@miee.ru
Rússia, Nalchik, 360004

R. Kalmykov

Berbekov Kabardino-Balkarian State University

Email: spt@miee.ru
Rússia, Nalchik, 360004


Declaração de direitos autorais © Pleiades Publishing, Ltd., 2018

Este site utiliza cookies

Ao continuar usando nosso site, você concorda com o procedimento de cookies que mantêm o site funcionando normalmente.

Informação sobre cookies