An Integrated High-Capacitance Varicap Based on Porous Silicon


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详细

The potential for use of porous silicon in designing varicaps with high capacitance ratios satisfying the requirements of microelectronics and microsystems engineering is considered. The technique for the fabrication of capacitor structures via the electrodeposition of copper onto porous silicon is presented. The morphological features of the obtained structures are examined and the specific capacitance of varicaps is determined. The prospects for the application of varicaps based on porous silicon in integrated electronics are outlined.

作者简介

S. Timoshenkov

National Research University of Electronic Technology

编辑信件的主要联系方式.
Email: spt@miee.ru
俄罗斯联邦, Moscow, 124498

A. Boyko

National Research University of Electronic Technology

Email: spt@miee.ru
俄罗斯联邦, Moscow, 124498

D. Gaev

Berbekov Kabardino-Balkarian State University

Email: spt@miee.ru
俄罗斯联邦, Nalchik, 360004

R. Kalmykov

Berbekov Kabardino-Balkarian State University

Email: spt@miee.ru
俄罗斯联邦, Nalchik, 360004


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