Design and Implementation of Fractional Order Differintegrators Using Reduced s to z Transforms
- Авторы: Rajasekhar K.1, Krishna B.T.1
 - 
							Учреждения: 
							
- Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University Kakinada
 
 - Выпуск: Том 63, № 12 (2018)
 - Страницы: 1406-1417
 - Раздел: Dynamic Chaos in Radiophysics and Electronics
 - URL: https://journals.rcsi.science/1064-2269/article/view/199311
 - DOI: https://doi.org/10.1134/S1064226918120185
 - ID: 199311
 
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Аннотация
The Design and implementation of fractional order digital differentiators and integrators is the main objective of this paper. Identify the novel reduced s to z transforms calculated using model order reduction techniques. Thus the transforms are discretized directly using Continued Fraction Expansion (CFE).The designed differentiators and integrators are implemented on Xilinx Spartan 3E field programmable gate arrays (FPGA) and are tested using the sinusoidal, square and triangular waveforms. The practical results agree with the theoretical ones.
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Об авторах
K. Rajasekhar
Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University Kakinada
							Автор, ответственный за переписку.
							Email: rajakarumuri87@gmail.com
				                					                																			                												                	Индия, 							Andhra Pradesh, 533003						
B. Krishna
Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University Kakinada
							Автор, ответственный за переписку.
							Email: tkbattula@gmail.com
				                					                																			                												                	Индия, 							Andhra Pradesh, 533003						
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