TCAD leakage current analysis of a 45 nm MOSFET structure with a high-k dielectric
- Authors: Petrosyants K.O.1,2, Popov D.A.1, Sambursky L.M.1,2, Kharitonov I.A.1
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Affiliations:
- National Research University Higher School of Economics
- Institute for Design Problems in Microelectronics
- Issue: Vol 45, No 7 (2016)
- Pages: 460-463
- Section: Article
- URL: https://journals.rcsi.science/1063-7397/article/view/185864
- DOI: https://doi.org/10.1134/S106373971607012X
- ID: 185864
Cite item
Abstract
The models of electrophysical effects builtinto Sentaurus TCAD have been tested. The models providing an adequate modeling of deep submicron high-k MOSFETs have been selected. The gate and drain leakage currents for 45 nm MOSFETs with polysilicon gate and SiO2, SiO2/HfO2 and HfO2 gate dielectrics have been calculated using TCAD. It has been shown that the replacement of the traditional SiO2 gate oxide by an equivalent HfO2 dielectric reduces the gate leakage current by several orders of magnitude due to the elimination of the impact of the tunneling effect. Besides, the threshold voltage, saturation drain current, mobility, transconductance, etc., degrade within a range of 10–20%.
Keywords
About the authors
K. O. Petrosyants
National Research University Higher School of Economics; Institute for Design Problems in Microelectronics
Author for correspondence.
Email: kpetrosyants@hse.ru
Russian Federation, Moscow, 115054; Moscow, 124681
D. A. Popov
National Research University Higher School of Economics
Email: kpetrosyants@hse.ru
Russian Federation, Moscow, 115054
L. M. Sambursky
National Research University Higher School of Economics; Institute for Design Problems in Microelectronics
Email: kpetrosyants@hse.ru
Russian Federation, Moscow, 115054; Moscow, 124681
I. A. Kharitonov
National Research University Higher School of Economics
Email: kpetrosyants@hse.ru
Russian Federation, Moscow, 115054