Formation of nanosized elements of microwave transistor gates by ion beam lithography

Abstract

A technique for forming a nanosized gate of a high-power microwave transistor is proposed. The optimal exposure parameters of 950-PMMA-A2 and ELP-20 resists are established. The technological route of ion beam lithography with the use of multilayer resists is investigated. A technique for fabricating a continuous mesh of earthed alignment marks formed on the ion-sensitive resist to visualize the alignment marks on a dielectric substrate by ion microscopy is developed.