The architecture of a branching prediction module based on a memristor and spintronic units with ultra-low power consumption

Abstract

The use of new technological components in integrated circuits allowed achieving a high parts density, low power consumption, as well as close association of memory and logic in the computing modules. The article describes the implementation of a branching prediction device based on memristors and spintronic threshold elements to use optimal the computing resources of the processor. Use of the local analog computing allowed realizing the module architecture carrying out a branching algorithm with the ability to specify the acceptable accuracy. Through comparative analysis with digital implementation of a neural algorithm, the proposed approach permits us to increase the energy efficiency significantly and reduce the hardware resources with a comparable accuracy of prediction and performance.