Comparative analysis of readout large-scale integrated circuits with an analog-to-digital converter in the cell for a photodetector of the far infrared range

Abstract

The design of a 14-bit delta-sigma analog-to-digital converter (ADC) with pipelined readout is considered. Basic concepts of the design of array photodetectors of the infrared (IR) range with an ADC in the accumulating cell are analyzed. The presence of an ADC in the readout large-scale integrated circuit (LSIC) cell provides an opportunity to increase the accumulation time by more than an order of magnitude and improve the threshold characteristics. A method for optimization of the ADC area by using an LFSR counter operating in two modes (digital code generation and serial readout) is proposed.