A System for Logical Design of Custom CMOS VLSI Functional Blocks with Reduced Power Consumption

P. N. Bibilo; N. A. Avdeev; S. N. Kardash; N. A. Kirienko; Yu. Yu. Lankevich; I. P. Loginova; V. I. Romanov; D. I. Cheremisinov; L. D. Cheremisinova

doi:10.1134/S106373971801002X

A System for Logical Design of Custom CMOS VLSI Functional Blocks with Reduced Power Consumption

作者: Bibilo P.N.¹, Avdeev N.A.¹, Kardash S.N.¹, Kirienko N.A.¹, Lankevich Y.Y.¹, Loginova I.P.¹, Romanov V.I.¹, Cheremisinov D.I.¹, Cheremisinova L.D.¹
隶属关系:
1. United Institute of Informatics Problems
期: 卷 47, 编号 1 (2018)
页面: 65-81
栏目: Article
URL: https://journals.rcsi.science/1063-7397/article/view/186786
DOI: https://doi.org/10.1134/S106373971801002X
ID: 186786

如何引用文章

全文:

开放存取

##reader.subscriptionAccessGranted##
受限制的访问

订阅存取

详细
作者简介
参考
补充文件
统计

详细

We describe a CMOSLD system to automate the design of irregular logic circuits of CMOS library elements. The main criteria of circuits optimization are the area and the power consumption. This system is integrated with software packages Questa Sim, LeonardoSpectrum, and Accusim II (Mentor Graphics). This makes it possible to perform efficiently logical simulation, synthesis, resynthesis and estimation of energy consumption based on logical and circuit simulation.