On the expressiveness of the approach to constructing PLC-programs by LTL-specification

Resumo

The article is devoted to an approach to constructing and verification of discrete PLC-programs by LTL-specification. This approach provides a possibility of analysing the correctness of PLCprograms by using the model checking method. The linear temporal logic LTL is used as a language of specification of the program behavior. The correctness analysis of LTL-specification is automatically performed by the symbolic model checking tool Cadence SMV. The article demonstrates the consistency of the approach to constructing and verification of PLC programs by LTL-specification from the point of view of Turing power. It is proved that in accordance with this approach for any Minsky counter machine an LTL-specification can be built, which is used for machine implementation in any PLC programming language of standard IEC 61131-3. Minsky machines are equipollent to Turing machines, and the considered approach also has the Turing power. The proof focuses on representation of a counter machine behavior in the form of a set of LTL-formulas and matching these formulas to constructions of ST and SFC languages. SFC is interesting as a specific graphical language. ST is considered as a basic language because the implementation of a counter machine on IL, FBD/CFC and LD languages is reduced to rewriting blocks of an ST-program. The idea of the proof is demonstrated by an example of a Minsky 3-counter machine, which implements a function of squaring.