Data processing in the firmware systems for logic control based on search networks
- Authors: Sklyarov V.1, Skliarova I.1
- 
							Affiliations: 
							- Universidade Aveiro, Instituto di Electrónica et Informática
 
- Issue: Vol 78, No 1 (2017)
- Pages: 100-112
- Section: Logical Control
- URL: https://journals.rcsi.science/0005-1179/article/view/150519
- DOI: https://doi.org/10.1134/S0005117917010088
- ID: 150519
Cite item
Abstract
It was proposed to use the hardware accelerators for analysis and data processing in the systems of logic control on a chip including the interacting processor system, memory, and configurable logic components. The data processing expected execution of operations over the sets of elements each of which can be activated by software and realized in the hardware in parallel networks admitting, if necessary, pipeline processing. New methods of design and use of the sorting and search networks were proposed, and the results of their theoretical and experimental comparison with the existing networks were presented.
About the authors
V. Sklyarov
Universidade Aveiro, Instituto di Electrónica et Informática
							Author for correspondence.
							Email: skl@ua.pt
				                					                																			                												                	Portugal, 							Aveiro						
I. Skliarova
Universidade Aveiro, Instituto di Electrónica et Informática
														Email: skl@ua.pt
				                					                																			                												                	Portugal, 							Aveiro						
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