Designs of multi-bit sigma delta modulator
- 作者: Sonika M.1, Neema D.2, Patel R.3
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隶属关系:
- Chhatrapati Shivaji Institute of Technology
- Chhattisgarh Institute of Technology
- FET, SSGI
- 期: 卷 59, 编号 6 (2016)
- 页面: 237-243
- 栏目: Article
- URL: https://journals.rcsi.science/0735-2727/article/view/176822
- DOI: https://doi.org/10.3103/S0735272716060017
- ID: 176822
如何引用文章
详细
This paper presents new design variants of third order multi-bit sigma delta modulator (SDM): low distortion SDM and cascaded SDM. The proposed modulator based on the conventional SDMsuch L-0MASH(Multi-stAge noise SHaping) and interstage feedback topology. TheMASHSDM is not a single loop system. One of the drawback is that performance is limited by uncancelled noise from the first modulator and interstage feedback topology only cancels nonlinear errors introducing by multi-bitDACin the final stage, but the rest stage still containsDACnonlinearity errors without any noise shaping which still degrade overall system performance. An improved version of cascaded multi-bit SDM is proposed to overcome these problems mentioned above. In addition a third order low distortion SDM is also proposed. Simulation results verify the superiority of the both proposed modulator.
作者简介
Ms. Sonika
Chhatrapati Shivaji Institute of Technology
编辑信件的主要联系方式.
Email: sonika444@gmail.com
印度, Durg
D. Neema
Chhattisgarh Institute of Technology
编辑信件的主要联系方式.
Email: neemadd@gmail.com
印度, Rajnandgaon
R. Patel
FET, SSGI
编辑信件的主要联系方式.
Email: ramnpatel@gmail.com
印度, Bhilai