Error Detection in Arithmetic-Logic Devices of Information-Measurement System Processors

Abstract

A regular procedure is proposed for adaptation of an algebraic linear code for error detection in arithmetic-logic instruments of information-measurement systems. The regularities that define the relationships between arithmetic-logic operations and the values of the check bits of the linear code relative to these operations are revealed. It is shown that these regularities make it possible to formulate rules for obtaining the values of corrections to check bits of the code in order to detect single and double errors with minimal information redundancy and hardware and time costs.