Complete Fault Detection Tests of Length 2 for Logic Networks under Stuck-at Faults of Gates


如何引用文章

全文:

开放存取 开放存取
受限制的访问 ##reader.subscriptionAccessGranted##
受限制的访问 订阅存取

详细

We consider the problem of the synthesis of the logic networks implementing Boolean functions of n variables and allowing short complete fault detection tests regarding arbitrary stuck-at faults at the outputs of gates. We prove that there exists a basis consisting of two Boolean functions of at most four variables in which we can implement each Boolean function by a network allowing such a test with length at most 2.

作者简介

K. Popkov

Keldysh Institute of Applied Mathematics

编辑信件的主要联系方式.
Email: kirill-formulist@mail.ru
俄罗斯联邦, Miusskaya pl. 4, Moscow, 125047


版权所有 © Pleiades Publishing, Ltd., 2018
##common.cookie##