Complete Fault Detection Tests of Length 2 for Logic Networks under Stuck-at Faults of Gates
- 作者: Popkov K.1
-
隶属关系:
- Keldysh Institute of Applied Mathematics
- 期: 卷 12, 编号 2 (2018)
- 页面: 302-312
- 栏目: Article
- URL: https://journals.rcsi.science/1990-4789/article/view/213052
- DOI: https://doi.org/10.1134/S1990478918020102
- ID: 213052
如何引用文章
详细
We consider the problem of the synthesis of the logic networks implementing Boolean functions of n variables and allowing short complete fault detection tests regarding arbitrary stuck-at faults at the outputs of gates. We prove that there exists a basis consisting of two Boolean functions of at most four variables in which we can implement each Boolean function by a network allowing such a test with length at most 2.
作者简介
K. Popkov
Keldysh Institute of Applied Mathematics
编辑信件的主要联系方式.
Email: kirill-formulist@mail.ru
俄罗斯联邦, Miusskaya pl. 4, Moscow, 125047