Том 62, № 3 (2019)

The article proposes the constructive synthesis methods of binary error correcting code of length N = 32 with the optimal value of peak-to-average power ratio of Walsh–Hadamard spectrum for MC-CDMA technology. The authors have developed three constructive methods for the synthesis of codewords of correcting code: in the time domain, in the Walsh–Hadamard transform domain, and in the Reed–Muller transform domain. The parameters of the built code correspond to the best-known codes in McWilliams table.

This paper deals with elliptical split ring resonator (ESRR) loaded CPW-fed ultra wideband (UWB) printed monopole antenna (PMA) with dual band-notching at 5.2 and 6.9 GHz to notch WLAN and C-band wireless applications, respectively. The antenna is fabricated on duroid dielectric substrate with thickness of 1.6 mm and ε_r = 2.2. The antenna uses two ESRR with different dimensions to create dual band-notched characteristics. Details of the proposed antenna are presented along with simulated results. The effect of ESRR dimensions and position is examined. The ESRR is also rotated and the effect of this rotation in the notch frequency is also examined. Radiation patterns are simulated by HFSS and omnidirectional radiation patterns in the H-plane could be observed. The group delay is nearly stable in the UWB frequency range, except at the notch frequencies, which is distorted sharply. So, the proposed antenna is a good candidate for the modern UWB systems. Finite element method (FEM) and finite integration technique (FIT) are used to simulate the proposed structures through the usage of HFSS and CST. A very good agreement between both results has been obtained.

An ultra-low power, voltage-mode front-end amplifier (FEA) for neural applications featuring subthreshold design is presented. This has been a topic of much research in implantable medical prosthetic devices during the past few decades to monitor and treat the neural disorders such as hearing or sight dysfunctions, epilepsy, Parkinson’s disease, paralysis. The FEA performs a critical signal detection operation in neural monitoring systems to ensure the biosignal fidelity. A matched double-MOS feedback technique is used to compensate the input leakage currents generated by low noise amplifier in the form of integrated circuit (IC), which is the primary reason for immense signal leakage in the input bias network. Therefore, this loop topology ensures that FEA maintains high impedance across a wide range of input frequency. The proposed FEA is implemented by using an SK Hynix 0.18 µm CMOS process. This IC consumes 320 nW in the area of 0.016 mm² and achieves the input impedance of 44.9 GΩ, and the input-referred noise of 153 nV/Hz^1/2.