Error Reduction in an Integrator Device in the Ultralow Frequency Range

Abstract

An original structure is presented for the creation of integrator devices for increased accuracy of integration in a range of ultralow frequencies. It has been proved that the integration error can be reduced by increasing, by an order of magnitude (the number of integrator links), the integrator devices. Results of calculations are presented, showing an increase in the accuracy of integration, depending on the frequency for two-and three-tiered integrators at various ratios of constants of link time.